Homework answers / question archive / a) What is the use of KMaps in finding Boolean expressions from a given truth table when Boolean algebra already exists? In other words, how is the method of using KMaps to find minimized Boolean expressions better than the method of using Boolean algebra? (3 points) b) Comparing the two basic methods for finding overflow in the complement system computation, explain which of those two methods would be LESS computationally intensive (faster/cheaper)? Feel free to explain your thoughts using circuits

a) What is the use of KMaps in finding Boolean expressions from a given truth table when Boolean algebra already exists? In other words, how is the method of using KMaps to find minimized Boolean expressions better than the method of using Boolean algebra? (3 points) b) Comparing the two basic methods for finding overflow in the complement system computation, explain which of those two methods would be LESS computationally intensive (faster/cheaper)? Feel free to explain your thoughts using circuits

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a) What is the use of KMaps in finding Boolean expressions from a given truth table when Boolean algebra already exists? In other words, how is the method of using KMaps to find minimized Boolean expressions better than the method of using Boolean algebra? (3 points) b) Comparing the two basic methods for finding overflow in the complement system computation, explain which of those two methods would be LESS computationally intensive (faster/cheaper)? Feel free to explain your thoughts using circuits. (4 points) c) Why are NAND/NOR gates considered as universal gates in CMOS? (3 points) d) What is the difference between synchronous and asynchronous inputs in sequential circuits? (3 points) e) What is the advantage of performing state minimization? (2 points) f) What is the difference between skew and jitter? (4 points) g) How does a 1-T DRAM compare with the 6-T SRAM in terms of storing? (2 points) h) What are the steps needed to conduct a 6-T SRAM READ operation (as in the diagram below)? How does this differ from a WRITE operation? (4 points) WL I M2 M4 Q M& M. !Q MA M3 !BL BL a) One of the most basic elements in FPGAs that makes it universal is a Look-up Table (LUT). Let's consider a very basic 2-input LUT circuit as shown below. This circuit is special because it has the ability to implement ANY 2-input Boolean function that you can think of. To prove this, we will take two examples and show how to implement them using this 2-input LUT circuit below. You will need to fill up the leftover inputs in the circuits, which are the 4 inputs to the muxes (ABCD) and 2 selector inputs. OPTIONAL: To see how this works, show that the LUT combination ABCD = 0111 results in the operation S1 + S2. It is useful to consider the equation of a 2:1 MUX. (a) Given this information, implement a (i) 2-input XOR and an (ii) inverter using this circuit below. Show the updated LUT circuit diagram for BOTH of them. (6 points) Si A 0 B C 0 D b) Let's consider the circuit F = X'Y' + YZ. Show that it exhibits a static hazard using KMaps. Specify the hazard pair(s) and the kind of hazard. (3 points) c) Now let's consider the POS form of F. Give the expression for the POS equivalent function for F. Show that it exhibits a static hazard using KMaps. Specify the hazard pair(s) and the kind of hazard. (4 points) d) How would you propose to fix each type of hazard that exists from the SOP or POS expression? Show any work necessary (5 points). e) Assuming either the SOP or the POS expression is updated and do not contain any static hazards, would there be dynamic hazards? Explain your reasoning. (2 points) Consider the circuit below. Suppose that each flip flop has a setup time of 1 ns, hold time of 0.5 ns, and experiences delay in the range of 2 - 3 ns. The combinational gates will have a delay of 4 ns. Q1 Q2 D Q D D Q Q ΔΙ A2 CLK a) First assume no clock skew occurs. We wish to run this circuit at a clock period of 5ns (200MHz frequency). Will it experience any setup time violation? Explain and show all work. (8 points) b) Let's add some clock skew with A1 = 0 ns, A2 = 2 ns. Re-examine the circuit to see if it experiences any setup time violation with the clock period of 5ns (200MHz frequency). Now check for hold time violations. Show all work. (8 points) c) If there are hold time violations in part (b), propose a solution. Assume that skew values cannot be modified. If there is no hold time violations in part (b), what is the margin that exists over a hold time violation occurring? (4 points) d) In general, is positive skew good for setup time violations? What about negative skew? Explain (5 points) Let's consider a design where you need to keep a track of a football (soccer) game. For simplicity, let's just consider 4 players in a single team - goalkeeper, defender, midfielder, and attacker. The players are set up in the order Goalkeeper -> Defender -> Midfielder -> Attacker. These players can only do a forward action, or a backward action. The non-attacker players on a forward action just pass the ball to the player ahead of them, and similarly, on a backward action just pass the ball to the player behind them. In the game, the non-attacker players can only pass to the player exactly ahead of them on a forward action or pass to the player exactly behind them on a backward action. So, to clarify, these players CANNOT skip a player in between, but ONLY pass to the adjacent player. For example, the defender can only pass forward to the midfielder or pass backwards to the goalkeeper. The defender cannot pass directly to the attacker by skipping the midfielder in between. However, the attacker on a forward action just shoots for the goal (and we assume that it's always a goal), in which case the machine resets to the goalkeeper and starts again, and on a backward action just passes the ball to the midfielder which is behind the attacker. Additionally, the goalkeeper on a backward action just gets the ball again (it remains with the goalkeeper). So overall, we have an input (x) controlling the backward x = 0 or forward x = 1 action and an output (y) specifying a y = 0 if it's not a goal, and a y = 1 if it is a goal. a) Would this machine be best implemented as a Mealy or a Moore machine? (3 points) b) Draw the state machine diagram that describes this football design. (5 points) c) Let's consider that we start at the goalkeeper, and provide the following events (F for forward and B for backward) - F, F, B, F, F, B, B, F, B, B, F, F, B, F, F, F. At the end of this sequence, specify the state of the machine and the output. (3 points) d) Draw the state transition or state assigned table for the design. Use the grey code counting order (in other words Goalkeeper - 00, Defender = 01, Midfielder = 11 Attacker = 10) (5 points) e) Design the sequential circuit from the table in part (d) using DFFS. ONLY necessary to show the equations, NO DIAGRAM NEEDED (6 points) f) Expand the table from part (d) to use TFFs instead of DFFS. NO NEED to derive any equations. (5 points) g) Can you relate this football state machine design (ignoring its output) with another well-known state machine design that you have seen before in lectures/assignment? Specify which one. (3 points) Consider the circuit below. Suppose that each flip flop has a setup time of 1 ns, hold time of 0.5 ns, and experiences delay in the range of 2 - 3 ns. The combinational gates will have a delay of 4 ns. Q1 Q2 D Q D D Q Q ΔΙ A2 CLK a) First assume no clock skew occurs. We wish to run this circuit at a clock period of 5ns (200MHz frequency). Will it experience any setup time violation? Explain and show all work. (8 points) b) Let's add some clock skew with A1 = 0 ns, A2 = 2 ns. Re-examine the circuit to see if it experiences any setup time violation with the clock period of 5ns (200MHz frequency). Now check for hold time violations. Show all work. (8 points) c) If there are hold time violations in part (b), propose a solution. Assume that skew values cannot be modified. If there is no hold time violations in part (b), what is the margin that exists over a hold time violation occurring? (4 points) d) In general, is positive skew good for setup time violations? What about negative skew? Explain (5 points) a) One of the most basic elements in FPGAs that makes it universal is a Look-up Table (LUT). Let's consider a very basic 2-input LUT circuit as shown below. This circuit is special because it has the ability to implement ANY 2-input Boolean function that you can think of. To prove this, we will take two examples and show how to implement them using this 2-input LUT circuit below. You will need to fill up the leftover inputs in the circuits, which are the 4 inputs to the muxes (ABCD) and 2 selector inputs. OPTIONAL: To see how this works, show that the LUT combination ABCD = 0111 results in the operation S1 + S2. It is useful to consider the equation of a 2:1 MUX. (a) Given this information, implement a (i) 2-input XOR and an (ii) inverter using this circuit below. Show the updated LUT circuit diagram for BOTH of them. (6 points) Si A 0 B C 0 D b) Let's consider the circuit F = X'Y' + YZ. Show that it exhibits a static hazard using KMaps. Specify the hazard pair(s) and the kind of hazard. (3 points) c) Now let's consider the POS form of F. Give the expression for the POS equivalent function for F. Show that it exhibits a static hazard using KMaps. Specify the hazard pair(s) and the kind of hazard. (4 points) d) How would you propose to fix each type of hazard that exists from the SOP or POS expression? Show any work necessary (5 points). e) Assuming either the SOP or the POS expression is updated and do not contain any static hazards, would there be dynamic hazards? Explain your reasoning. (2 points) Let's consider a design where you need to keep a track of a football (soccer) game. For simplicity, let's just consider 4 players in a single team - goalkeeper, defender, midfielder, and attacker. The players are set up in the order Goalkeeper -> Defender -> Midfielder -> Attacker. These players can only do a forward action, or a backward action. The non-attacker players on a forward action just pass the ball to the player ahead of them, and similarly, on a backward action just pass the ball to the player behind them. In the game, the non-attacker players can only pass to the player exactly ahead of them on a forward action or pass to the player exactly behind them on a backward action. So, to clarify, these players CANNOT skip a player in between, but ONLY pass to the adjacent player. For example, the defender can only pass forward to the midfielder or pass backwards to the goalkeeper. The defender cannot pass directly to the attacker by skipping the midfielder in between. However, the attacker on a forward action just shoots for the goal (and we assume that it's always a goal), in which case the machine resets to the goalkeeper and starts again, and on a backward action just passes the ball to the midfielder which is behind the attacker. Additionally, the goalkeeper on a backward action just gets the ball again (it remains with the goalkeeper). So overall, we have an input (x) controlling the backward x = 0 or forward x = 1 action and an output (y) specifying a y = 0 if it's not a goal, and a y = 1 if it is a goal. a) Would this machine be best implemented as a Mealy or a Moore machine? (3 points) b) Draw the state machine diagram that describes this football design. (5 points) c) Let's consider that we start at the goalkeeper, and provide the following events (F for forward and B for backward) - F, F, B, F, F, B, B, F, B, B, F, F, B, F, F, F. At the end of this sequence, specify the state of the machine and the output. (3 points) d) Draw the state transition or state assigned table for the design. Use the grey code counting order (in other words Goalkeeper - 00, Defender = 01, Midfielder = 11 Attacker = 10) (5 points) e) Design the sequential circuit from the table in part (d) using DFFS. ONLY necessary to show the equations, NO DIAGRAM NEEDED (6 points) f) Expand the table from part (d) to use TFFs instead of DFFS. NO NEED to derive any equations. (5 points) g) Can you relate this football state machine design (ignoring its output) with another well-known state machine design that you have seen before in lectures/assignment? Specify which one. (3 points)