One "time slot interchange" (TSI) slot operation involves one memory read and one memory write. This operation has to be completed for all the slots before the next bytes arrive at the slots (because each slot in the TSI switch holds 8 bits = 1 byte).

Time difference b/w arrival of two consecutive bytes at the slot = (1 / 16K) seconds
No. of slots = 8

Hence, time required for one memory read or write = (1/16K) / (2*8) seconds
= 1 / (16*1024*2*8) seconds
= 3814.7 nanoseconds

If you are considering "one memory cycle of this switch" as "one memory read + one memory write", double up the time obtained above for your answer.

We can also arrive at the above answer using following logic -

Required number of memory operations per second = number of slots * number of bytes arriving at a slot in one second * number of memory operations associated with each byte
= 8 * (16*1024) * 2
= 262144 memory operations per second (Each memory read or write is considered as a separate memory operation).

So, time required for one memory read or write = 1/262144 seconds = 3814.7 nanoseconds.