Stevens Institute Of Technology

CS 550

Chapter 9 Input / Output

1)Which of the following is not a requirement for a computer system to handle I/O in a sufficient and effective manner?

1. 1. Peripheral devices must be individually addressable.
   2. Peripheral devices must operate only in block mode.
   3. Peripheral devices can initiate communication with the CPU.
   4. Programmed I/O is suitable only for slow devices and individual word transfers.

2. An important difference between the I/O requirements of keyboards and disk drives is that
   1. keyboard input is fast while disk drives are slow.
   2. keyboards require constant monitoring, while disk drives do not.
   3. disk drives have I/O controllers and keyboards do not have I/O controllers.
   4. disk data is always transferred in blocks, never as individual bytes as with the keyboard.

3. From the perspective of a computer, the network
   1. is just another I/O device.
   2. requires an Ethernet connection.
   3. is complex set of interconnected hosts.
   4. is addressable only in blocks of 32 bit addresses.

4. The method used to communicate events that need special attention to the CPU are known as
   1. interrupts.
   2. I/O controllers.
   3. programmed I/O.
   4. device controllers.

5. The method of transferring data one word at a time from the CPU to a device is called
   1. polling.
   2. programmed I/O.
   3. vectored interrupt.
   4. direct memory access.

6. Computers provide interrupt capability by providing one or more special control lines to the central processor known as
   1. fault lines.
   2. address lines.
   3. interrupt lines.
   4. instruction lines.

7. The program that determines the appropriate course of action in the event an interrupt occurs is called the
   1. fault handler.
   2. device handler.
   3. interrupt handler.
   4. instruction handler.

8. When an interrupt causes temporary suspension of the program in progress, all the pertinent information about the program being suspended, including the location of the last instruction executed, and the values of data in various registers are stored in an area of memory known as the
   1. register dump block.
   2. memory dump block.
   3. program method block.
   4. process control block.

9. After interrupting a program in execution, and saving the program’s context, the computer then branches to a special program known as the
   1. driver routine.
   2. servicing program.
   3. program service program.
   4. interrupt handler program.

10. Since many interrupts exist to support I/O devices, most of the interrupt handling programs are also known as
    1. device drivers.
    2. device handlers.
    3. peripheral handlers.
    4. peripheral controllers.

11. The method of continuously checking the various input devices to determine if input data is waiting is called

1. polling.
2. observing.
3. monitoring.
4. supervising.

12. Which of the following is not a function of how interrupts are used?

1. A completion signal
2. An abnormal event indicator
3. A means of allocating CPU time
4. A way of buffering large amounts of data

13. Which of the following is an example of an interrupt being used as an external event notifier?

1. A keyboard input
2. A program inadvertently attempts to divide by zero
3. A time quantum has passed and the CPU is interrupted to start another task
4. An application program requests service from the operating system using a software interrupt

14. External events like keyboard input, mouse clicks, printer “out of paper” messages, and power failures are handled by

1. interrupts.
2. device handlers.
3. peripheral controllers.
4. suspension subprograms.

15. The computer system provides an internal clock that sends an interrupt periodically to the CPU signaling that it’s time to start processing another program or thread. The time between interrupt pulses is known as a(n)

1. delta.
2. quantum.
3. unit quantity.
4. atomic quantity.

16. Events related to problems or special conditions within the computer system itself, like divide by zero, or attempting to execute a nonexistent op code, are called

1. irregular events.
2. unusual events.
3. abnormal events.
4. anomalous events.

17. Internal interrupts caused by events related to problems or special conditions within the computer itself are sometimes called

1. exclusions.
2. exemptions.
3. special errors.
4. traps or exceptions.

18. Instructions that are intended for use by an operating system program, but not by an application program, are called

1. control instructions
2. limited instructions
3. prevalent instructions
4. privileged instructions

19. The software interrupt is very similar to which type of instruction?

1. STORE
2. LOAD
3. IF-THEN-ELSE
4. SUBROUTINE JUMP

20. The mnemonic for the x86 architecture instruction that simulates an interrupt is

1. SVC.
2. INT.
3. JMP.
4. GTO.

21. One way to assure that multiple programs do not unintentionally alter another program's files or intermingle printer output is to

1. only execute one interrupt at a time.
2. give programs in execution the highest priority.
3. not allow programs in execution to be interrupted.
4. require that all I/O to shared devices be handled by the operating system.

22. When the device generating the interrupt request identifies its address as part of the interrupt, it is called

1. polling interrupt.
2. discrete interrupt.
3. vectored interrupt.
4. monitoring interrupt.

23. Multiple interrupts can be handled by assigning                           to each interrupt.

1. priorities
2. a time delay
3. queue levels
4. execution tickets

24. Power failures, internal time-sensitive events, or external events that are time sensitive will trigger interrupts that are

1. low priority events.
2. high priority events.
3. dependent on the device generating the interrupt.
4. measured for time-to-complete and scheduled accordingly.

25. Interrupts that can be temporarily disabled by program instructions are called

1. variable.
2. maskable.
3. changeable.
4. transferable.

26. Interrupts that can never be temporarily disabled by program instructions are called

1. invariable.
2. unchangeable.
3. nonmaskable.
4. non-transferable.

27. Interrupts are normally checked

1. during the operation of the instruction cycle.
2. immediately, without regard to the instruction cycle.
3. simultaneously with the beginning of an execution cycle.
4. after one instruction is finished and before another begins.

28. An I/O technique that transfers block data directly between the I/O controller and computer memory, is called

1. direct block access.
2. direct RAM access.
3. direct block transfers.
4. direct memory access.

29. Data from disks, and tapes, and flash memory are transferred only in

1. bits.
2. chunks of data.
3. blocks of data.
4. characters or bytes of data.

30. Which of the following is not one of the three primary conditions for direct memory access to take place?

1. The I/O device must have an internal buffer.
2. There must be a method to connect together the I/O interface and memory.
3. There must be a means to avoid conflict between the CPU and the I/O controller.
4. The I/O controller associated with the particular device must be capable of reading and writing to memory.

31. Four pieces of data must be provided to the I/O controller for a particular I/O device to initiate the DMA transfer. Which of the following is not required?

1. The size of the block to be transferred.
2. The location of the data on the I/O device.
3. The length of time required to transfer the data.
4. The starting location of the block of data in memory.

32. The incompatibilities in speed between the various devices and the CPU make I/O synchronization difficult, especially if there are multiple devices attempting to do I/O at the same time. To handle these problems data is usually stored

1. in a buffer.
2. on the network.
3. on the disk drive.
4. in external storage.

33. I/O controllers that control a single type of device are often called

1. device controllers.
2. precision controllers.
3. peripheral controllers.
4. single-type controllers.

34. An I/O controller that is designed to control hard disks is called a

1. disk handler.
2. disk controller.
3. disk coordinator.
4. disk interrupt handler.

35. Which of the following is not a common function of an I/O disk controller?

1. The I/O disk controller manages main memory during the transfer.
2. The I/O disk controller recognizes messages addressed to it and accepts commands from the CPU.
3. The I/O disk controller has interrupt capability, which it uses to notify the CPU when the transfer is complete.
4. The I/O disk controller provides a buffer where the data from memory can be held until it can be transferred to the disk.

Discussion questions

1. Why is it so important that the CPU be allowed to do other tasks while waiting for a particular I/O operation to be completed? (Two or three sentences should be adequate to answer this question.)

2. What would happen if interrupts were checked and processed during the middle of an execution cycle instead of after the execution cycle has completed? (Two or three sentences should be adequate to answer this question)

3. Once a DMA transfer has been initiated, why is it important that data being transferred not be modified during this period? (Two or three sentences should be adequate to answer this question)
4. Explain why it is better to have an I/O device initiate an interrupt to the CPU rather than the CPU monitor the I/O device. (Two or three sentences should be adequate to answer this question)
5. Suppose that the keyboard device stored keystrokes in a buffer until it was full then sent the entire buffer for processing. What would be some adverse consequences? (Two or three sentences should be adequate to answer this question)
6. Consider the steps required to write a block of data from a disk to memory. Outline the major sequence of I/O events that must occur to make this possible. (There are three major steps)

7. Suppose an application program has initiated a DMA transfer from an I/O device, why does the I/O device controller interrupt the CPU when it's complete? (Two or three sentences should be adequate to answer this question)

8. Describe how the computer uses interrupts to control the flow of data to the printer.
9. Discuss how writing a device driver for a hard disk would require an in-depth understanding of how the hardware functions. Would you also need an in-depth understanding of the OS platform for which the device was designed to function? (Recommend using over 100 words to adequately answer this question)
10. How is an arithmetic overflow error or divide by zero error interrupt different than an interrupt from the hard disk controller signaling that a data transfer has completed? (Three or four sentences are sufficient)
11. A program in execution generates an interrupt with low priority. Before that interrupt is handled, it generates a high priority interrupt. Discuss how these two interrupts change the flow of execution from the start of the low priority interrupt through the completion of interrupt handling for this sequence of interrupts. (Three or four sentences are sufficient)
12. The system designer of a workstation computer wants to have enough interrupt codes (IRQs) to support 32 different interrupt lines, IRQ0 – IRQ31. How many bits are needed to address all the IRQs? Show your work and how you arrived at the solution.

13. Suppose that all programs in a particular CPU are given 50 clock cycles to process before getting swapped out for another program. Suppose also, that it takes 5 CPU clock cycles to swap out the process control block (PCB) for a particular program and restore the next program’s PCB.

1. What percent of the CPU clock cycles are used for processing 100 programs? (Hint: calculate: Program clock cycles / (Swap clock cycles + Program clock cycles)). Show your work and how you arrived at the solution.

…………………………………………………………………………………………………………………

2. With the same conditions as above assume that each of the 100 programs has one and only one interrupt lasting 25 clock cycles. What percent of the CPU clock cycles are used for processing 100 programs?

To get started, here is an example for 2 programs and 2 interrupts.

EXAMPLE: 2 programs and 2 interrupts:

Program one gets interrupted at the 42nd clock cycle (arbitrarily chosen), and the interrupt gets serviced leaving 8 clock cycles to be completed (8 +42 = 50 cycles):

|<--------42cycles-------->|<--5cycles-->|<---25cycles---->|<--5cycles-->|<----8cycles-------------- >|

|<--------Prog1 start----->|<----swap-->|<---interrupt---->|<--swap----->|<--Prog1 complete->|

After swapping program two into the CPU, program two gets interrupted at the 12th cycle (arbitrarily chosen), and the interrupt gets serviced leaving 38 clock cycles (12 +38 = 50 cycles):

|<--5cycles-->|<---12cycles-->|<--5cycles-->|<---25cycles---->|<--5cycles-->|-------38cycles---------- >|

|<--swap--->|<---Prog2 start->|<----swap--->|<---interrupt---->|<--swap-->|<-Prog2 complete---- >|

The total number of clock cycles used to swap out the PCB is 3n-1, where n is the number of programs. Total number of Clock cycles to swap out the PCB = (3n-1)* 5 = 5*5 = 25

Total number of Program clock cycles = n*50 = 2*50 = 100. Total number of Interrupt clock cycles = n*25 = 2*25 = 50.

Percent of CPU clock cycles used for processing 2 programs = 100/(25 +100+ 50) = 100/175 or 57.1%.

Now, calculate the percent of the CPU clock cycles are used for processing 100 programs were each program gets interrupted only once.

14. If my CPU runs at 4.0GHz, and on average takes 10 clock cycles to complete an instruction, how many instructions will be completed in the time it takes to type "MY CPU IS RUNNING NOW"? Assume it takes 5 seconds to type the message. Show your work and how you arrived at the solution.
15. In terms of performance gains, what role does an I/O controller located inside the peripheral device perform? (50 to 100 words should be sufficient to answer this question)