Clemson University

COURSE TITLE-CPSC 3300 Colwell Quiz

Chapter 5

1)What is the outcome of the concept phase? The refinement phase? The realization phase?

2. What are the barriers faced in driving a new design into production?

3. How does pre-silicon testing of cache SRTL differ from post-silicon testing

of the actual cache hardware?

4.What is a speed curve?

5.What was the purpose of the "war room"? List some of the issues that were

handled.

6.Explain the three reasons Colwell cites why you might choose not to fix a bug.

7.What are test vectors?

8.Identify and discuss some performance tuning tips for the P6.

9.Was the choice to favor 32-bit performance over 16-bit performance a good decision? If so, why was Colwell subject to so much criticism? Explain

10.Why should you hold back some design tasks for the engineers who are finishing up another project?